The recent revolution in telecommunications has led to developments in all technologies relating to communications. One area which has seen a significant amount of growth in not only the adoption and use of, but also in its development, is wireless technology. Unfortunately, one area of wireless technology which not been fully developed or examined is the speed at which data is encoded in wireless devices prior to its wireless transmission to a wireless receiver. This encoding is necessary to allow for forward error correction (FEC) techniques to be applied at the receiver. Such FEC technologies allow for the correction of errors which may be introduced into the data when it is wirelessly transmitted.
One such encoding can be convolutional encoding. The encoded data (with the encoding producing more data than was input to allow for the inclusion of the error correction redundancies in the data), when received by the receiver, is decoded by a decoder. Such decoders normally use the well known Viterbi decoding method in one form or another to retrieve the original data. However, while transmission speeds and decoding speeds have been pushed higher and higher, the encoding is still executed in a serially bitwise manner. Essentially, data to be encoded is serially fed to the encoder and the resulting encoded data is also output serially. This approach is seen in U.S. Pat. No. 5,193,094 issued to Viterbi, U.S. Pat. No. 5,787,121 issued to Okamoto, and US Patent Application Publication 2001008022 A1 (Kokuryo et al). It should be note that Okamoto uses multiple serial encoders arranged in a parallel manner to try and attempt a pseudo-parallel implementation of convolutional encoders.
While at least one of the above-mentioned disclosures tries to overcome the problem of serial convolutional encoding, none of them actually succeed. One problem with using serial convolutional encoders is that to increase the encoding speed, the speed of the clocking signal used by the encoder is increased. Unfortunately, such an approach would not only lead to increased power consumption but also to elevated device temperatures and more complex circuit layouts when implementing the design.
An ideal solution to the above issue would be a parallel implementation of a convolutional encoder. Such an encoder would encode data in a bitwise parallel manner.
It is an object of the present invention to present alternatives to the prior art and to at least mitigate the drawbacks of the prior art.